India, Dec. 3 -- Cocotb, a new tool to test and verify chip designs, has been in the news.
Cocotb is a COroutine-based COsimulation TestBench environment for verifying VHDL and SystemVerilog RTL using python. Using open source, it will allow HDL code to bind with python code using VPI or VHPI implementation of the simulator.
We can get full access to DUT VHDL ports, and internal signals from python. For those unaware, a hardware description language (HDL) is used to describe structure and behavior of electronic circuits, to design ASICs and program FPGAs.
Verification ensures that implementation fulfils technical requirements and specifications. HDL testbenches script stimulus and verify outputs. They make use of software-like language...
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