US Patent Issued to Xilinx on June 24 for "Latency balancing of paths in multi-processor computing architecture designs for deadlock avoidance" (Indian Inventor)

ALEXANDRIA, Va., June 25 -- United States Patent no. 12,340,154, issued on June 24, was assigned to Xilinx Inc. (San Jose, Calif.).

"Latency balancing of paths in multi-processor computing architecture designs for deadlock avoidance" was invented by Krishnam Tibrewala (Bengaluru, India).

According to the abstract* released by the U.S. Patent & Trademark Office: "Providing first-in-first-out (FIFO) memory guidance for a multi-processor computing architecture includes compiling a design for a data processing array to generate a compiled design. The compiled design is mapped and routed to the data processing array. The compiled design is simulated using a modified device model of the data processing array. The modified device model uses infi...