US Patent Issued to Xilinx on June 10 for "Deadlock detection and prevention for routing packet-switched nets in electronic systems" (California, Washington Inventors)

ALEXANDRIA, Va., June 18 -- United States Patent no. 12,327,077, issued on June 10, was assigned to Xilinx Inc. (San Jose, Calif.).

"Deadlock detection and prevention for routing packet-switched nets in electronic systems" was invented by Sreesan Venkatakrishnan (San Jose, Calif.), Nitin Deshmukh (Monroe, Wash.) and Satish B. Sivaswamy (Fremont, Calif.).

According to the abstract* released by the U.S. Patent & Trademark Office: "Routing a circuit design includes generating a graph of the circuit design where each connected component is represented as a vertex, generating a routing solution for the circuit design by routing packet-switched nets so that the packet-switched nets of a same connected component do not overlap, and, for each rou...