US Patent Issued to VERIFAI on Nov. 11 for "Method and system for using deep learning to improve design verification by optimizing code coverage, functional coverage, and bug detection" (California, New Jersey Inventors)

ALEXANDRIA, Va., Nov. 11 -- United States Patent no. 12,468,874, issued on Nov. 11, was assigned to VERIFAI INC. (Palo Alto, Calif.).

"Method and system for using deep learning to improve design verification by optimizing code coverage, functional coverage, and bug detection" was invented by William Alexander Hughes (San Jose, Calif.), Sandeep Srinivasan (Palo Alto, Calif.) and Rohit Uday Suvarna (Jersey City, N.J.).

According to the abstract* released by the U.S. Patent & Trademark Office: "Methods, systems, and devices for tuning a set of simulation parameters associated with a design verification environment are described that include: simulating a circuit design according to a set of simulation runs; providing, to a machine learning n...