US Patent Issued to Ventana Micro Systems on Oct. 21 for "Microprocessor that builds sequential multi-fetch block macro-op cache entries" (California Inventors)

ALEXANDRIA, Va., Oct. 28 -- United States Patent no. 12,450,066, issued on Oct. 21, was assigned to Ventana Micro Systems Inc. (Cupertino, Calif.).

"Microprocessor that builds sequential multi-fetch block macro-op cache entries" was invented by John G. Favor (San Francisco) and Michael N. Michael (Folsom, Calif.).

According to the abstract* released by the U.S. Patent & Trademark Office: "A microprocessor includes a prediction unit (PRU) that predicts a sequence of fetch blocks (FBlks) in a program instruction stream, a macro-op (MOP) cache (MOC) that comprises MOC entries (MEs), and a fusion engine. An ME includes an expected next ME identifier and a counter, updated by the PRU as it predicts the ME in the program instruction stream, tha...