ALEXANDRIA, Va., Dec. 9 -- United States Patent no. 12,493,469, issued on Dec. 9, was assigned to Ventana Micro Systems Inc. (Cupertino, Calif.).
"Microprocessor that extends sequential multi-fetch block macro-op cache entries" was invented by John G Favor (San Francisco) and Michael N. Michael (Folsom, Calif.).
According to the abstract* released by the U.S. Patent & Trademark Office: "A microprocessor includes a prediction unit (PRU) that predicts a sequence of fetch blocks (FBlks) in a program instruction stream and a macro-op (MOP) cache (MOC) that comprises MOC entries (MEs). An ME is either a single-FBlk ME (SF-ME) that holds MOPs associated with a single FBlk or a multi-FBlk ME (ME-ME) that holds MOPs associated with multiple FBlks...