ALEXANDRIA, Va., Dec. 16 -- United States Patent no. 12,498,933, issued on Dec. 16, was assigned to Ventana Micro Systems Inc. (Cupertino, Calif.).
"Prediction unit that predicts successor fetch block start address of multi-fetch block macro-op cache entry" was invented by John G. Favor (San Francisco) and Michael N. Michael (Folsom, Calif.).
According to the abstract* released by the U.S. Patent & Trademark Office: "A microprocessor includes a prediction unit (PRU) comprising a fetch block (FBlk) predictor (FBP) that predicts a sequence of FBlks, each FBlk having a corresponding fetch block start address (FBSA), and branch predictors; a macro-op (MOP) cache (MOC) includes MOC entries (MEs) including multi-FBlk MOC entries (MF-MEs) for ho...