US Patent Issued to TAIWAN SEMICONDUCTOR MANUFACTURING on Sept. 30 for "Epitaxial source/drain feature with enlarged lower section interfacing with backside via" (Taiwanese Inventors)

ALEXANDRIA, Va., Sept. 30 -- United States Patent no. 12,432,990, issued on Sept. 30, was assigned to TAIWAN SEMICONDUCTOR MANUFACTURING Co. LTD. (Hsinchu, Taiwan).

"Epitaxial source/drain feature with enlarged lower section interfacing with backside via" was invented by Feng-Ching Chu (Hsinchu, Taiwan), Wei-Yang Lee (Taipei, Taiwan) and Chia-Pin Lin (Hsinchu County, Taiwan).

According to the abstract* released by the U.S. Patent & Trademark Office: "A semiconductor structure includes an isolation structure; first and second source/drain (S/D) features over the isolation structure, defining a first direction from the first S/D feature to the second S/D feature from a top view; one or more channel layers connecting the first and the second...