US Patent Issued to Taiwan Semiconductor Manufacturing on Oct. 28 for "Via landing on first and second barrier layers to reduce cleaning time of conductive structure" (Taiwanese Inventors)

ALEXANDRIA, Va., Oct. 28 -- United States Patent no. 12,456,677, issued on Oct. 28, was assigned to Taiwan Semiconductor Manufacturing Co. Ltd. (Hsinchu, Taiwan).

"Via landing on first and second barrier layers to reduce cleaning time of conductive structure" was invented by Te-Hsien Hsieh (Kaohsiung, Taiwan), Yu-Hsing Chang (Taipei, Taiwan) and Yi-Min Chen (Hsinchu, Taiwan).

According to the abstract* released by the U.S. Patent & Trademark Office: "In some embodiments, the present disclosure relates to an integrated chip that includes a conductive structure arranged within a substrate or a first dielectric layer. A first barrier layer is arranged on outermost sidewalls and a bottom surface of the conductive structure. A second barrier l...