US Patent Issued to TAIWAN SEMICONDUCTOR MANUFACTURING on Nov. 25 for "Methods of reducing parasitic capacitance in semicondutor devices" (Taiwanese Inventors)

ALEXANDRIA, Va., Nov. 25 -- United States Patent no. 12,484,292, issued on Nov. 25, was assigned to TAIWAN SEMICONDUCTOR MANUFACTURING Co. LTD. (Hsinchu, Taiwan).

"Methods of reducing parasitic capacitance in semicondutor devices" was invented by Kai-Hsuan Lee (Hsinchu, Taiwan), Feng-Cheng Yang (Hsinchu County, Taiwan), Yen-Ming Chen (Hsin-Chu County, Taiwan) and Sai-Hooi Yeong (Hsinchu County, Taiwan).

According to the abstract* released by the U.S. Patent & Trademark Office: "A method includes providing a workpiece including a gate structure (MG), a first spacer along a sidewall of the MG, a second spacer along a sidewall of the first spacer, and a source/drain (S/D) feature adjacent to the second spacer. The method further includes for...