ALEXANDRIA, Va., June 10 -- United States Patent no. 12,294,033, issued on May 6, was assigned to Taiwan Semiconductor Manufacturing Co. Ltd. (Hsinchu, Taiwan).

"Deep trench capacitor array with reduced warpage" was invented by Fu-Chiang Kuo (Hsinchu, Taiwan).

According to the abstract* released by the U.S. Patent & Trademark Office: "A semiconductor die includes an array of first capacitor regions, each of the first capacitor regions including multiple first capacitor cell structures, wherein each first capacitor cell structure includes a plurality of first trench segments characterized by a first trench length, a first trench width, and a first trench spacing, and a first air gap width in a gap-filling material. The semiconductor die al...