US Patent Issued to Taiwan Semiconductor Manufacturing on March 25 for "Separated read BL scheme in 3T dram for read speed improvement" (Taiwanese Inventors)

ALEXANDRIA, Va., March 26 -- United States Patent no. 12,260,897, issued on March 25, was assigned to Taiwan Semiconductor Manufacturing Co. Ltd. (Hsinchu, Taiwan).

"Separated read BL scheme in 3T dram for read speed improvement" was invented by Hidehiro Fujiwara (Hsin-chu, Taiwan), Yi-Hsun Chiu (Zhubei, Taiwan) and Yih Wang (Hsinchu, Taiwan).

According to the abstract* released by the U.S. Patent & Trademark Office: "A memory device includes a memory array having a first memory cell in a first column of the memory array, a second memory cell in the first column of the memory array, a first read bit line extending in a column direction and connected to the first memory cell to read data from the first memory cell, and a second read bit li...