US Patent Issued to Taiwan Semiconductor Manufacturing on July 8 for "Layout for reducing loading at line sockets and/or for increasing overlay tolerance while cutting lines" (Taiwanese Inventors)

ALEXANDRIA, Va., July 9 -- United States Patent no. 12,354,951, issued on July 8, was assigned to Taiwan Semiconductor Manufacturing Co. Ltd. (Hsinchu, Taiwan).

"Layout for reducing loading at line sockets and/or for increasing overlay tolerance while cutting lines" was invented by Harry-Hak-Lay Chuang (Zhubei, Taiwan), Kuo-Chyuan Tzeng (Chu-Pei, Taiwan), Wan-Chen Chen (Hsinchu, Taiwan) and Chang-Chih Huang (Taichung, Taiwan).

According to the abstract* released by the U.S. Patent & Trademark Office: "Various embodiments of the present disclosure are directed towards methods for forming conductive lines and conductive sockets using mandrels with turns, as well as the resulting conductive lines and sockets. A conductive socket of the prese...