US Patent Issued to Taiwan Semiconductor Manufacturing on Dec. 30 for "Integrated circuit layout validation using machine learning" (Taiwanese, American Inventors)

ALEXANDRIA, Va., Dec. 31 -- United States Patent no. 12,511,467, issued on Dec. 30, was assigned to Taiwan Semiconductor Manufacturing Co. Ltd. (Hsinchu, Taiwan).

"Integrated circuit layout validation using machine learning" was invented by Rachid Salik (Sunnyvale, Calif.), Chin-Chang Hsu (New Taipei, Taiwan), Cheng-Chi Wu (Hsinchu, Taiwan), Chien-Wen Chen (Hsinchu, Taiwan) and Wen-Ju Yang (Hsinchu, Taiwan).

According to the abstract* released by the U.S. Patent & Trademark Office: "Systems, methods, and devices are described herein for integrated circuit (IC) layout validation. A plurality of IC patterns are collected which include a first set of patterns capable of being manufactured and a second set of patterns incapable of being manuf...