US Patent Issued to TAIWAN SEMICONDUCTOR MANUFACTURING on Dec. 23 for "Region based shrinking methodology for integrated circuit layout migration" (Taiwanese Inventors)

ALEXANDRIA, Va., Dec. 23 -- United States Patent no. 12,505,272, issued on Dec. 23, was assigned to TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD. (Hsinchu, Taiwan).

"Region based shrinking methodology for integrated circuit layout migration" was invented by Chi-Wen Chang (Hsinchu, Taiwan) and Jui-Feng Kuan (Hsinchu, Taiwan).

According to the abstract* released by the U.S. Patent & Trademark Office: "A method of making a semiconductor device includes determining a first scaling factor for a first region of a first device layout, wherein the first region comprises a first plurality of conductive patterns. The method further includes determining a second scaling factor for a second region of the first device layout, wherein the second regi...