US Patent Issued to TAIWAN SEMICONDUCTOR MANUFACTURING on Aug. 19 for "Integrated circuit layouts with fill feature shapes" (Taiwanese Inventors)

ALEXANDRIA, Va., Aug. 20 -- United States Patent no. 12,393,759, issued on Aug. 19, was assigned to TAIWAN SEMICONDUCTOR MANUFACTURING Co. LTD (Hsinchu, Taiwan).

"Integrated circuit layouts with fill feature shapes" was invented by Yu-Cheng Yeh (New Taipei, Taiwan), Yen-Sen Wang (Hsinchu, Taiwan) and Ming-Yi Lin (Hsinchu, Taiwan).

According to the abstract* released by the U.S. Patent & Trademark Office: "Various examples of conductor features in integrated circuit layouts are disclosed herein. In an example, a method includes receiving an integrated circuit layout, inserting, into the integrated circuit layout, a design containing a first set of Front-End Of Line (FEOL) shapes of an integrated circuit and a first set of Back-End Of Line ...