US Patent Issued to Synopsys on March 18 for "Glitch identification and power analysis using simulation vectors" (Indian, American Inventors)

ALEXANDRIA, Va., March 19 -- United States Patent no. 12,254,255, issued on March 18, was assigned to Synopsys Inc. (Sunnyvale, Calif.).

"Glitch identification and power analysis using simulation vectors" was invented by Joydeep Banerjee (Karnataka, India), Mayur Bubna (Karnataka, India), Debabrata Das Roy (Karnataka, India) and Solaiman Rahim (San Francisco).

According to the abstract* released by the U.S. Patent & Trademark Office: "A method includes: receiving a simulation vector associated with a circuit design, wherein the simulation vector is associated with a simulation vector type; identifying, by a processor, a plurality of glitch transitions from among one or more transitions associated with a pin of a cell of the circuit design...