ALEXANDRIA, Va., Jan. 13 -- United States Patent no. 12,524,591, issued on Jan. 13, was assigned to Synopsys Inc. (Sunnyvale, Calif.).
"Library scaling for circuit design analysis" was invented by Jianquan Zheng (San Jose, Calif.) and Peivand Tehrani (Campbell, Calif.).
According to the abstract* released by the U.S. Patent & Trademark Office: "The present disclosure describes systems and methods for scaling timing libraries for circuit design analysis. The method includes applying a first transformation to timing library data for an electric component design to produce first transformed timing library data and applying a second transformation to the timing library data to produce second transformed timing library data. The method also in...