ALEXANDRIA, Va., Feb. 19 -- United States Patent no. 12,231,125, issued on Feb. 18, was assigned to Synopsys Inc. (Sunnyvale, Calif.).
"Power efficient retention flip flop circuit" was invented by Sai Yaswanth Divvela (Andhra Pradesh, India), Amit Verma (Telangana, India), Basannagouda Reddy (San Jose, Calif.) and Deepak D. Sherlekar (Cupertino, Calif.).
According to the abstract* released by the U.S. Patent & Trademark Office: "A circuit includes: a first latch; a second latch coupled to the first latch; and a third latch coupled to the second latch at an input terminal of the second latch, wherein the third latch includes: a first inverter and a second inverter, the first inverter being coupled between the input terminal of the second l...