US Patent Issued to Synopsys on Dec. 23 for "Dividing a chip design flow into sub-steps using machine learning" (North Carolina, California Inventors)

ALEXANDRIA, Va., Dec. 23 -- United States Patent no. 12,505,273, issued on Dec. 23, was assigned to Synopsys Inc. (Sunnyvale, Calif.).

"Dividing a chip design flow into sub-steps using machine learning" was invented by Amzie Allen Adams (Raleigh, N.C.), Joseph R. Walston (Durham, N.C.) and Piyush Verma (Sunnyvale, Calif.).

According to the abstract* released by the U.S. Patent & Trademark Office: "A method includes generating a plurality of intermediate designs for a chip by executing a first sub-step based on a first plurality of inputs, adding at least one intermediate design of the plurality of intermediate designs to a second plurality of inputs, generating a plurality of final designs by executing a second sub-step of the step of the...