US Patent Issued to STMicroelectronics International on July 8 for "Tuning of read/write cycle time delay for a memory circuit dependent on operational mode selection" (Indian Inventors)

ALEXANDRIA, Va., July 9 -- United States Patent no. 12,353,341, issued on July 8, was assigned to STMicroelectronics International N.V. (Geneva).

"Tuning of read/write cycle time delay for a memory circuit dependent on operational mode selection" was invented by Bhupender Singh (New Delhi), Hitesh Chawla (Noida, India), Tanuj Kumar (Noida, India), Harsh Rawat (Faridabad, India), Kedar Janardan Dhori (Ghaziabad, India), Promod Kumar (Greater Noida, India), Manuj Ayodhyawasi (Noida, India) and Nitin Chawla (Noida, India).

According to the abstract* released by the U.S. Patent & Trademark Office: "A memory circuit includes an array of memory cells arranged in rows and columns. A word line is connected to the memory cells of each row. A row d...