US Patent Issued to STATS ChipPAC on Nov. 4 for "Power envelope analysis for the thermal optimization of multi-chip modules" (South Korean, American, Chinese Inventors)

ALEXANDRIA, Va., Nov. 6 -- United States Patent no. 12,462,084, issued on Nov. 4, was assigned to STATS ChipPAC Pte. Ltd. (Singapore).

"Power envelope analysis for the thermal optimization of multi-chip modules" was invented by Chien Ouyang (Pleasanton, Calif.), Xiao Gu (JiangSu, China), Yonghyuk Jeong (Incheon, South Korea) and Michael Mingliang Liu (Fullerton, Calif.).

According to the abstract* released by the U.S. Patent & Trademark Office: "A semiconductor device is made by calculating a thermal resistance matrix for the semiconductor device. A plurality of maximum junction temperatures for the plurality of die of the semiconductor device is selected. A plurality of power envelope surfaces are calculated for the semiconductor device ...