ALEXANDRIA, Va., Oct. 28 -- United States Patent no. 12,455,997, issued on Oct. 28, was assigned to SK Hynix Inc (Icheon, South Korea) and IUCF-HYU (Industry-University Cooperation Foundation Hanyang University) (Seoul, South Korea).

"Method for generating a layout of an integrated circuit" was invented by Youngbog Yoon (Icheon, South Korea) and Jaeduk Han (Seoul, South Korea).

According to the abstract* released by the U.S. Patent & Trademark Office: "Generating a layout of an integrated circuit having a plurality of components may be performed by generating placement information of the plurality of components; generating pin position information for pins of the plurality of components; generating grid information according to the pin po...