ALEXANDRIA, Va., Nov. 6 -- United States Patent no. 12,461,584, issued on Nov. 4, was assigned to Silicon Laboratories Inc. (Austin, Texas).
"Optimal ram layout for power consumption" was invented by Jean Francois Deschenes (Ste-Marthe-sur-le-lac, Canada) and Cedric Migliorini (Roxboro, Canada).
According to the abstract* released by the U.S. Patent & Trademark Office: "An improved layout for volatile memory is disclosed. The volatile memory comprises a plurality of banks that may be independently powered during deep sleep mode. The memory layout attempts to locate all items and data that are retained near one end of the volatile memory, such as near the starting address of the volatile memory. These items include secure RAM, instructions...