US Patent Issued to Silergy Semiconductor Technology (Hangzhou) on Sept. 16 for "Stacked package structure and stacked packaging method for chip" (Chinese Inventor)

ALEXANDRIA, Va., Sept. 17 -- United States Patent no. 12,418,000, issued on Sept. 16, was assigned to Silergy Semiconductor Technology (Hangzhou) LTD (Hangzhou, China).

"Stacked package structure and stacked packaging method for chip" was invented by Xiaochun Tan (Hangzhou, China).

According to the abstract* released by the U.S. Patent & Trademark Office: "A stacked package structure for a chip, can include: a substrate having a first surface and a second surface opposite thereto; a first die having an active and back faces, where the active face of the first die includes pads; a first enclosure that covers the first die; an interlinkage that extends to the first enclosure to electrically couple with the pads; a first redistribution body ...