US Patent Issued to Semiconductor Energy Laboratory on Nov. 18 for "Circuit layout generation system" (Japanese Inventors)

ALEXANDRIA, Va., Nov. 18 -- United States Patent no. 12,475,292, issued on Nov. 18, was assigned to Semiconductor Energy Laboratory Co. Ltd. (Atsugi, Japan).

"Circuit layout generation system" was invented by Munehiro Kozuma (Atsugi, Japan), Minato Ito (Atsugi, Japan), Yusuke Koumura (Atsugi, Japan) and Tatsuya Onuki (Atsugi, Japan).

According to the abstract* released by the U.S. Patent & Trademark Office: "The circuit layout generation system includes a memory portion, a limitation data arithmetic portion, and a layout data arithmetic portion. The memory portion is configured to store circuit connection data and first limitation data. The circuit connection data is data regarding connection of a transistor and a capacitor included in a ...