US Patent Issued to SAMSUNG ELECTRONICS on May 27 for "Step-stacked nanowire CMOS structure for low power logic device and method of manufacturing the same" (New York Inventors)

ALEXANDRIA, Va., June 17 -- United States Patent no. 12,317,588, issued on May 27, was assigned to SAMSUNG ELECTRONICS Co. Ltd. (Yongin-si, South Korea).

"Step-stacked nanowire CMOS structure for low power logic device and method of manufacturing the same" was invented by Byounghak Hong (Latham, N.Y.), Seungchan Yun (Waterford, N.Y.) and Kang-ill Seo (Albany, N.Y.).

According to the abstract* released by the U.S. Patent & Trademark Office: "A CMOS device including a substrate comprising a shallow trench isolation region, an nFET on the substrate above the shallow trench isolation region, and a pFET. The nFET includes a source region, a drain region, a channel region including a series of nanowires extending from the source region to the d...