ALEXANDRIA, Va., Jan. 29 -- United States Patent no. 12,212,646, issued on Jan. 28, was assigned to Rambus Inc. (San Jose, Calif.).
"Power efficient circuits and methods for phase alignment" was invented by Pavan Kumar Kasibhatla (Bengaluru, India) and Jitendra Mishra (Bangalore, India).
According to the abstract* released by the U.S. Patent & Trademark Office: "A timing-calibration circuit uses an active phase interpolator to calibrate clock delays through a number of passive fractional delay elements. The timing-calibration circuit minimizes system-wide power consumption by limiting the number and usage of active phase interpolators for delay adjustment in favor of the passive fractional delay elements."
The patent was filed on Oct. 27...