US Patent Issued to QuickLogic on Feb. 4 for "Programmable logic device with design for test functionality" (American, Taiwanese Inventors)

ALEXANDRIA, Va., Feb. 5 -- United States Patent no. 12,217,811, issued on Feb. 4, was assigned to QuickLogic Corp. (San Jose, Calif.).

"Programmable logic device with design for test functionality" was invented by Ket Chong Yap (San Jose, Calif.), Chihhung Liao (Fremont, Calif.) and Shieh Huan Yen (New Taipei, Taiwan).

According to the abstract* released by the U.S. Patent & Trademark Office: "A programmable logic device (PLD) supports scan testing of configurable logical blocks using scannable word line (WL) shift register (WLSR) chains to enable writes to configurable memory bits while scan test data is input via a scan chain comprising scannable bit line (BL) shift registers (BLSRs). Input test data may be shifted onto BLs to write dat...