US Patent Issued to Powerchip Semiconductor Manufacturing on July 8 for "Multilayer stacking wafer bonding structure and method of manufacturing the same" (Taiwanese Inventors)

ALEXANDRIA, Va., July 9 -- United States Patent no. 12,354,870, issued on July 8, was assigned to Powerchip Semiconductor Manufacturing Corp. (Hsinchu, Taiwan).

"Multilayer stacking wafer bonding structure and method of manufacturing the same" was invented by Shou-Zen Chang (Hsinchu, Taiwan) and Chun-Lin Lu (Hsinchu, Taiwan).

According to the abstract* released by the U.S. Patent & Trademark Office: "A multilayer stacking wafer bonding structure is provided in the present invention, including a logic wafer with a substrate and a logic circuit layer on the substrate, multiple memory wafers bonded sequentially on the logic circuit layer to form a first multilayer stacking structure, wherein each memory wafer includes a memory layer, a silic...