US Patent Issued to Pensando Systems on April 29 for "Systems and methods for using a packet processing pipeline circuit to extend the capabilities of rate limiter circuits" (California Inventors)

ALEXANDRIA, Va., June 9 -- United States Patent no. 12,289,255, issued on April 29, was assigned to Pensando Systems Inc. (Milpitas, Calif.).

"Systems and methods for using a packet processing pipeline circuit to extend the capabilities of rate limiter circuits" was invented by Vishwas Danivas (Santa Clara, Calif.), Murty Subba Rama Chandra Kotha (San Jose, Calif.), Tuyen Quoc (Saratoga, Calif.), Hui Peng (Cupertino, Calif.) and Kit Chiu Chu (Fremont, Calif.).

According to the abstract* released by the U.S. Patent & Trademark Office: "The rate limiter circuits in the packet processing chip of a NIC are a limited hardware resource that may limit the number of workloads that can be run on a server. Some such chips include an egress packet p...