ALEXANDRIA, Va., Nov. 25 -- United States Patent no. 12,481,592, issued on Nov. 25, was assigned to NXP USA Inc. (Austin, Texas).
"System and method for tracing instruction cache misses" was invented by Rajan Srivastava (Noida, India) and Sourav Roy (Kolkata, India).
According to the abstract* released by the U.S. Patent & Trademark Office: "A system on chip (SoC) architecture includes an integrated branch and cache hit-miss trace circuit operably coupled to a CPU core, a first trace circuit, and a cache hit-miss trace circuit. Following an occurrence of a cache-fetch instruction: the cache hit-miss trace circuit identifies whether the fetch instruction is a cache-missed instruction, and, in response thereto, sends a cache miss report mes...