US Patent Issued to Micron Technology on Oct. 21 for "Adaptive integrity scan rates in a memory sub-system based on block health metrics" (California, Idaho Inventors)

ALEXANDRIA, Va., Oct. 28 -- United States Patent no. 12,451,197, issued on Oct. 21, was assigned to Micron Technology Inc. (Boise, Idaho).

"Adaptive integrity scan rates in a memory sub-system based on block health metrics" was invented by Vamsi Pavan Rayaprolu (Santa Clara, Calif.), Christopher M. Smitchger (Boise, Idaho), James Fitzpatrick (Laguna Niguel, Calif.), Patrick R. Khayat (San Diego) and Sampath K. Ratnam (San Jose, Calif.).

According to the abstract* released by the U.S. Patent & Trademark Office: "A processing device in a memory sub-system detects an occurrence of a data integrity check trigger event and, responsive to the occurrence of the data integrity check trigger event, identifies a memory die of a plurality of memory ...