US Patent Issued to Micron Technology on May 13 for "Page request interface support in handling host submission queues and completion automation associated with caching host memory address translation data" (California Inventors)

ALEXANDRIA, Va., June 12 -- United States Patent no. 12,298,916, issued on May 13, was assigned to Micron Technology Inc. (Boise, Idaho).

"Page request interface support in handling host submission queues and completion automation associated with caching host memory address translation data" was invented by Prateek Sharma (San Jose, Calif.), Raja V. S. Halaharivi (Gilroy, Calif.), Sumangal Chakrabarty (Campbell, Calif.) and Venkat R. Gaddam (Fremont, Calif.).

According to the abstract* released by the U.S. Patent & Trademark Office: "A device includes an address translation circuit of host interface circuitry to handle address translation requests to a host system from a host queue interface circuit. The address translation circuit includ...