US Patent Issued to Micron Technology on March 4 for "Memory with parallel main and test interfaces" (Idaho Inventors)

ALEXANDRIA, Va., March 5 -- United States Patent no. 12,243,610, issued on March 4, was assigned to Micron Technology Inc. (Boise, Idaho).

"Memory with parallel main and test interfaces" was invented by James Brian Johnson (Boise, Idaho), Kunal R. Parekh (Boise, Idaho), Brent Keeth (Boise, Idaho), Eiichi Nakano (Boise, Idaho) and Amy Rae Griffin (Boise, Idaho).

According to the abstract* released by the U.S. Patent & Trademark Office: "Methods, systems, and devices for memory with parallel main and test interfaces are described. A memory die may be configured with parallel interfaces that may individually (e.g., separately) support evaluation operations (e.g., before or as part of assembly in a multiple-die stack) or access operations (e....