US Patent Issued to Micron Technology on June 24 for "Conductive layers in memory array region and methods for forming the same" (Japanese Inventor)

ALEXANDRIA, Va., June 25 -- United States Patent no. 12,342,527, issued on June 24, was assigned to Micron Technology Inc. (Boise, Idaho).

"Conductive layers in memory array region and methods for forming the same" was invented by Kohei Morita (Hiroshima, Japan).

According to the abstract* released by the U.S. Patent & Trademark Office: "Apparatuses and methods for manufacturing semiconductor memory devices are described. An example method includes: forming a plurality of capacitor contacts on a substrate; forming a dielectric layer on the plurality of capacitor contacts; removing portions of the dielectric layer to form a plurality of openings in the dielectric layer; exposing the plurality of capacitor contacts at bottoms of the plurali...