US Patent Issued to Micron Technology on July 8 for "Triple activate command row address latching" (Idaho, Colorado Inventors)

ALEXANDRIA, Va., July 9 -- United States Patent no. 12,353,729, issued on July 8, was assigned to Micron Technology Inc. (Boise, Idaho).

"Triple activate command row address latching" was invented by Kwang-Ho Cho (Boise, Idaho), Miki Matsumoto (Boise, Idaho) and Kevin J. Ryan (Elizabeth, Colo.).

According to the abstract* released by the U.S. Patent & Trademark Office: "Methods, systems, and devices for triple activate command row address latching are described. For instance, a memory device may receive a first activate command that indicates a first set of bits of a row address, a second activate command that indicates a second set of bits of the row address, and a third activate command that indicates a third set of bits of the row addr...