US Patent Issued to Micron Technology on July 22 for "Methods and apparatus for using spacer-on-spacer design for solder joint reliability improvement in semiconductor devices" (Singaporean Inventors)

ALEXANDRIA, Va., July 23 -- United States Patent no. 12,368,113, issued on July 22, was assigned to Micron Technology Inc. (Boise, Idaho).

"Methods and apparatus for using spacer-on-spacer design for solder joint reliability improvement in semiconductor devices" was invented by Faxing Che (Singapore), Hong Wan Ng (Singapore), Yeow Chon Ong (Singapore), Wei Yu (Singapore), Ling Pan (Singapore) and Lin Bu (Singapore).

According to the abstract* released by the U.S. Patent & Trademark Office: "A semiconductor package assembly includes a substrate, a die stack including at least a bottom die, an inert top spacer, and at least a first inert base spacer. The inert top and base spacers are exclusive of any circuits. A top surface of the inert to...