US Patent Issued to Micron Technology on Jan. 20 for "Adaptive optimization of error-handling flows in memory devices" (American, Indian Inventors)

ALEXANDRIA, Va., Jan. 20 -- United States Patent no. 12,530,123, issued on Jan. 20, was assigned to Micron Technology Inc. (Boise, Idaho).

"Adaptive optimization of error-handling flows in memory devices" was invented by Jay Sarkar (San Jose, Calif.), Vamsi Pavan Rayaprolu (Santa Clara, Calif.) and Ipsita Ghosh (Kolkata, India).

According to the abstract* released by the U.S. Patent & Trademark Office: "Systems and methods are disclosed including a memory device and a processing device operatively coupled to the memory device. The processing device can perform operations including sending, to a device that provides error-handling flow optimization, an ordered set of error-handling operations to be performed to recover data residing in a s...