US Patent Issued to Micron Technology on Jan. 13 for "Automated optimization of error-handling flows in memory devices" (American, Indian Inventors)

ALEXANDRIA, Va., Jan. 13 -- United States Patent no. 12,524,291, issued on Jan. 13, was assigned to Micron Technology Inc. (Boise, Idaho).

"Automated optimization of error-handling flows in memory devices" was invented by Jay Sarkar (San Jose, Calif.), Ipsita Ghosh (Kolkata, India) and Vamsi Pavan Rayaprolu (Santa Clara, Calif.).

According to the abstract* released by the U.S. Patent & Trademark Office: "Systems and methods are disclosed including a memory device and a processing device operatively coupled to the memory device. The processing device can perform operations including selecting sample data residing in the memory device; running a test on the sample data regarding a set of error-handling operations; and generating log data co...