US Patent Issued to Micron Technology on Jan. 13 for "Accessing data using error correction operation(s) to reduce latency at a memory sub-system" (California, Idaho Inventors)

ALEXANDRIA, Va., Jan. 13 -- United States Patent no. 12,524,303, issued on Jan. 13, was assigned to Micron Technology Inc. (Boise, Idaho).

"Accessing data using error correction operation(s) to reduce latency at a memory sub-system" was invented by Vamsi Pavan Rayaprolu (Santa Clara, Calif.), Dung Viet Nguyen (San Jose, Calif.), Zixiang Loh (Folsom, Calif.), Sampath K. Ratnam (San Jose, Calif.), Patrick R. Khayat (San Diego) and Thomas Herbert Lentz (Boise, Idaho).

According to the abstract* released by the U.S. Patent & Trademark Office: "A request to access data programmed to a memory sub-system is received. A determination is made of whether a memory device that stores the data referenced by the request satisfies a weak memory device c...