US Patent Issued to Micron Technology on Feb. 4 for "Parallelized defect detection across multiple sub-blocks in a memory device" (American, Japanese, Italian Inventors)

ALEXANDRIA, Va., Feb. 5 -- United States Patent no. 12,217,799, issued on Feb. 4, was assigned to Micron Technology Inc. (Boise, Idaho).

"Parallelized defect detection across multiple sub-blocks in a memory device" was invented by Paing Z. Htet (Union City, Calif.), Akira Goda (Tokyo), Eric N. Lee (San Jose, Calif.), Jeffrey S. McNeil (Nampa, Idaho), Junwyn A. Lacsao (Folsom, Calif.), Kishore Kumar Muchherla (San Jose, Calif.), Sead Zildzic (Folsom, Calif.) and Violante Moschiano (Avezzano, Italy).

According to the abstract* released by the U.S. Patent & Trademark Office: "A memory array includes a block including wordlines, bitlines, and strings each connected to a respective bitline. The block is divided into a sub-blocks. Each sub-bloc...