US Patent Issued to Micron Technology on Feb. 10 for "Corrective read of a memory device with reduced latency" (California Inventors)

ALEXANDRIA, Va., Feb. 11 -- United States Patent no. 12,547,344, issued on Feb. 10, was assigned to Micron Technology Inc. (Boise, Idaho).

"Corrective read of a memory device with reduced latency" was invented by Tao Liu (San Jose, Calif.), Zhengang Chen (San Jose, Calif.) and Ting Luo (Santa Clara, Calif.).

According to the abstract* released by the U.S. Patent & Trademark Office: "Methods, systems, and devices for a corrective read of a memory device with reduced latency are described. A memory system may identify a read error based on accessing a memory device, and may select a trim setting for a performing a corrective read operation based on a data retention condition associated with the accessed memory device. Such a data retention ...