ALEXANDRIA, Va., June 12 -- United States Patent no. 12,300,333, issued on May 13, was assigned to Kioxia Corp. (Tokyo).

"Semiconductor memory device capable of shortening erase time" was invented by Noboru Shibata (Kawasaki, Japan).

According to the abstract* released by the U.S. Patent & Trademark Office: "In a memory cell array, a plurality of memory cells connected to a plurality of word lines and a plurality of bit lines are arranged in a matrix. A control circuit controls the potentials of said plurality of word lines and said plurality of bit lines. In an erase operation, the control circuit erases an n number of memory cells (n is a natural number equal to or larger than 2) of said plurality of memory cells at the same time using ...