US Patent Issued to Kioxia on Feb. 25 for "Failure analysis system of semiconductor device, failure analysis method of semiconductor device, and non-transitory computer readable medium" (Japanese Inventors)

ALEXANDRIA, Va., Feb. 26 -- United States Patent no. 12,235,770, issued on Feb. 25, was assigned to Kioxia Corp. (Tokyo).

"Failure analysis system of semiconductor device, failure analysis method of semiconductor device, and non-transitory computer readable medium" was invented by Mami Kodama (Yokohama, Japan), Yoshikazu Iizuka (Kawasaki, Japan), Masahiro Noguchi (Shinagawa, Japan) and Yumiko Watanabe (Yokohama, Japan).

According to the abstract* released by the U.S. Patent & Trademark Office: "According to one embodiment, the failure analysis system of the semiconductor device includes a memory, a failure information management table, and an analyzing unit. The memory stores normal/failure information collected in a block unit and a colu...