ALEXANDRIA, Va., June 19 -- United States Patent no. 12,334,923, issued on June 17, was assigned to Kepler Computing Inc. (San Francisco).
"Multi-cycle reset mechanism for a chain of majority gates having non-linear polar material" was invented by Amrita Mathuriya (Portland, Ore.), Rafael Rios (Austin, Texas), Ikenna Odinaka (Durham, N.C.), Rajeev Kumar Dokania (Beaverton, Ore.) and Sasikanth Manipatruni (Portland, Ore.).
According to the abstract* released by the U.S. Patent & Trademark Office: "A multiplier cell is derived from a 1-bit full adder and an AND gate. The 1-bit full adder is derived from majority and/or minority gates. The majority and/or minority gates include non-linear polar material (e.g., ferroelectric or paraelectric m...