US Patent Issued to Kepler Computing on July 29 for "Ferroelectric or paraelectric wide-input minority or majority gate based low power adder" (Oregon, Texas, North Carolina Inventors)

ALEXANDRIA, Va., July 30 -- United States Patent no. 12,374,377, issued on July 29, was assigned to Kepler Computing Inc. (San Francisco).

"Ferroelectric or paraelectric wide-input minority or majority gate based low power adder" was invented by Amrita Mathuriya (Portland, Ore.), Ikenna Odinaka (Durham, N.C.), Rajeev Kumar Dokania (Beaverton, Ore.), Rafael Rios (Austin, Texas) and Sasikanth Manipatruni (Portland, Ore.).

According to the abstract* released by the U.S. Patent & Trademark Office: "A low power adder uses a non-linear polar capacitor to retain charge with fewer transistors than traditional CMOS sequential circuits. The non-linear polar capacitor includes ferroelectric material, paraelectric material, or non-linear dielectric. ...