US Patent Issued to International Business Machines on Nov. 18 for "Equivalence checking of synthesized logic designs using generated synthesis history" (American, Israeli Inventors)

ALEXANDRIA, Va., Nov. 18 -- United States Patent no. 12,475,287, issued on Nov. 18, was assigned to International Business Machines Corp. (Armonk, N.Y.).

"Equivalence checking of synthesized logic designs using generated synthesis history" was invented by Alexander Ivrii (Haifa, Israel), Jason Raymond Baumgartner (Austin, Texas), Robert Lowell Kanzelman (Rochester, Minn.), Mark Allen Williams (Pleasant Valley, N.Y.), Mihir Choudhury (Jersey City, N.J.) and Ayesha Akhter (Austin, Texas).

According to the abstract* released by the U.S. Patent & Trademark Office: "An example system includes a processor to receive a high-level design representation of a system architecture. The processor can synthesize a logic design and generate an associate...