ALEXANDRIA, Va., June 10 -- United States Patent no. 12,293,137, issued on May 6, was assigned to International Business Machines Corp. (Armonk, N.Y.).

"Processor core simulator including trace-based coherent cache driven memory traffic generator" was invented by Mohit Karve (Austin, Texas).

According to the abstract* released by the U.S. Patent & Trademark Office: "A core simulator includes one or more simulated processors, a trace-based traffic generator, and a simulated memory subsystem. Each simulated processor includes a core element and at least one lower-level cache excluded from the core element. The trace-based traffic generator includes a plurality of modeled caches that model the at least lower-level cache without modeling the ...