ALEXANDRIA, Va., Feb. 11 -- United States Patent no. 12,550,421, issued on Feb. 10, was assigned to International Business Machines Corp. (Armonk, N.Y.).

"VTFET with reduced parasitic capacitance" was invented by Ruilong Xie (Niskayuna, N.Y.), Hemanth Jagannathan (Niskayuna, N.Y.), Kangguo Cheng (Schenectady, N.Y.) and Juntao Li (Cohoes, N.Y.).

According to the abstract* released by the U.S. Patent & Trademark Office: "Embodiments of present invention provide a transistor structure. The transistor structure includes a first vertical fin of a first vertical transistor, the first vertical fin having a first and a second sidewall and a first and a second vertical end; a first bottom source/drain (S/D) region underneath the first vertical fin...